Senior System Verilog Verification Engineer - Cambridge, United Kingdom - Platform Recruitment

Tom O´Connor

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Tom O´Connor

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Description
Senior System Verilog Verification Engineer - Cambridge - Negotiable


I am currently recruiting for a senior system Verilog verification engineer for a client of mine that specialise in machine learning & AI inference solutions.

You will architect their next generation of verification environment for their FPGA based AI Inferencingsolutions.


Key responsibilities:

  • Designing System Verilog based verification environments to support a
range of IP products


  • Optimizing verification code to enable fast simulation support for software
integration


  • Communicating the verification environment design and supporting others
to use, add and extend testing during IP development


Key skills:

  • Strong understanding of Verilog
  • Experience simulating and verifying large RTL designs
  • Experience working in Linux based development environments
  • Knowledge of C/ C or other imperative coding language

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