Staff Physical Implementation Methodology Engineer - Cambridge, United Kingdom - ARM

ARM
ARM
Verified Company
Cambridge, United Kingdom

3 weeks ago

Tom O´Connor

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Tom O´Connor

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Description

Job Overview:

Are you passionate about setting new standards in silicon physical design? We have a phenomenal opportunity in the Advanced Technology Team (ATD) of the Productivity Engineering (PE) Group


You will conduct investigations involving new tools, flows, methodologies and standards such that we make physical implementation of Arm CPU, GPU, Systems and ML Hardware IP products more effective.

We will include the results of your investigations intothe Arm Physical Implementation Methodology Roadmap.


We offer a role with high potential for development - both technically but also with collaboration and leadership skills Prior experience in physical implementation on IP or tapeout projects is expected.


Responsibilities:


  • Defining scope and value of investigations
  • Conducting investigations relying on your physical implementation expertise. That will often involve doing practical experiments/proofs of concept, possibly developing a Minimum Viable Product
  • Helping maintain specific standardized solutions
  • Collaborating with EDA partners to experiment with their solutions
  • Collaborating with the engineering community to seek feedback and transition investigations from Proof of Concept to MVP
  • Contributing to the leadership of the ATD team

Required Skills and Experience:


  • Previous experience with the IC design flow, from RTL through to GDS
  • Proven programming and scripting skills
  • Expressing new insights and communicating them effectively
  • The ability to develop for others, taking on board external perspectives

"Nice To Have" Skills and Experience:

  • Working with Arm based SoCs, large SoCs or advanced CPU/GPU designs
  • DevOps/SW related experience with building automation around physical implementation practices
  • Deploying a new methodology onto a project
  • Hardware description languages (e.g. Verilog RTL design).
  • Working with multiple EDA providers
LH-LB 3
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