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    Modeling Engineer - Cambridge, United Kingdom - European Recruitment

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    Job Description

    Principal SoC Modeling Engineer

    We are working with the world's premier CPU and IP development company who are looking to recruit and experienced performance modeling engineer to their global headquarters in Cambridge. As a Performance Modelling Engineer, you will be responsible for creating these system level performance models and evaluating them. You will also be responsible for prototyping and exploring future system IP and system architecture features. This is a permanent role that will be based on-site in Cambridge, visa sponsorship is available for the role.

    Responsibilities for the role:

    • Shape the Future of Our Systems: Collaborate with architects to envision and model next-generation systems within the company.
    • Craft Holistic System Models: Build comprehensive system models by integrating various IP models from across the company.
    • Optimize System Performance: Conduct performance characterization studies, identifying bottlenecks and opportunities for optimization.
    • Drive Innovation in System Components: Develop exploration models for critical components like interconnects, caches, and memory controllers.
    • Champion IP Feature Efficiency: Lead exploration studies that evaluate the effectiveness of proposed IP features within a broader system context.
    • Empower System Analysis: Develop infrastructure to facilitate in-depth system inspection and root-cause analysis for informed decision-making.
    • Lead System Performance Modelling: Play a key role in defining the future direction and best practices for system performance modelling across the company.

    Requirements for this role:

    • Performance Modeling Expertise: Demonstrate significant experience in developing and utilizing cycle-approximate/accurate performance models.
    • Performance Prediction & Analysis: Possess experience in generating pre-silicon/pre-RTL performance projections and conducting performance bottleneck debug and analysis.
    • Programming Proficiency: Exhibit strong programming and debugging skills in C/C++.

    Additional useful skills:

    • On-Chip Communication Expertise: Possess in-depth knowledge of on-chip bus protocols (AMBA, etc.), coherency flows, interconnects, and memory subsystems.
    • CPU Microarchitecture Understanding: Demonstrate a strong understanding of CPU microarchitecture principles.
    • Performance Evaluation & Benchmarking: Leverage experience in evaluating and benchmarking system-level performance using hardware performance monitors.
    • Performance Analysis & Tuning Pro: Bring exposure to performance analysis and optimization techniques, applicable in both pre-silicon and post-silicon environments.

    Keywords: SoC Modeling / Performance Modeling / CPU / Microarchitecture / Bottleneck / Performance Bottlenecks / DDR / DDR5 / LPDDR5 / LPDDR/6 / HBM / Dynamic Memory / Coherency / Performance Characterization / Cambridge / UK

    By applying to this role you understand that we may collect your personal data and store and process it on our systems. For more information please see our Privacy Notice (https://eu-)



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