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Senior Maritime Engineer - Godalming, Surrey, United Kingdom - Platform Recruitment
Description
FPGA Engineer, Surrey, 50- 55p/hExperience required:
~5+ years FPGA design experience
~ VHDL and Xilinx
~ Full FPGA cycle from RTL design to bitstream generation
~ Essential simulation and on-chip/board debugging capabilities
~ Knowledge of ADCs, DDR memory and UDP ethernet (desired)
Further details
Full time onsite (4 days minimum) (Accommodation provided Mon-Fri if required)
Company falls under small company exemption for IR35
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