- Actively contribute to all phases of the verification flow.
- Take ownership in specific project areas from testbench development through to overall verification methodology.
- Produce test plans and verification strategies.
- Plan, track, and coordinate both individual and team tasks and ensure the quality of verification work being done.
- Take part in verification improvement strategies across the CPU group and wider verification community.
- A minimum of 3 years' experience working in verification environments for complex RTL designs.
- Knowledgeable in the use of hardware verification languages; eg, SystemVerilog or Specman.
- Deep understanding of end-to-end verification processes.
- Experience working with verification methodologies such as UVM.
- Previous experience working on microprocessor designs.
- Experience working with assembly languages, and/or C/C++
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Verification Engineer - Cambridge, Cambridgeshire, United Kingdom - European Recruitment
Description
Verification Engineer - Semiconductor / UVM / SystemVerilog
Interested in this role You can find all the relevant information in the description below.
We are recruiting Verification Engineers of all seniorities to work for a global leader in the semiconductor industry specializing in the development of cutting-edge next-generation CPU and GPU processors.
This is a permanent working opportunity based in Cambridge, UK.
Key responsibilities for this Verification Engineer position:
If you are interested in this Verification Engineer position, please send a CV to
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