- A proven track record in SoC verification and validation with exposure to all phases in the flow – requirements collection, methodology and test plans, testbench implementation, coverage closure, documentation etc.
- Deep understanding of modern verification and validation techniques including formal, UVM/OVM/eRM, low power, emulation
- A strong analytical approach capable of building and using data driven approaches to reporting, closure and sign-off
- Good knowledge of the SoC design flow from specification to silicon tape-out
- The ability to communicate clearly with both expert and non-expert audiences
Design Verification Engineer - City of Bristol, United Kingdom - IC Resources
Description
Verification Engineer – Senior and Principal level
Do not wait to apply after reading this description a high application volume is expected for this opportunity.Bristol, UK
This is a fantastic opportunity to help support the build of a new Bristol based Chip Team, working on innovative, class leading silicon.
My client has opened a small design centre in the bustling City of Bristol. The HQ is in the North. My client is developing a novel photonic-electronic architecture that will bring fully homomorphic encryption to the world. The development provides a huge opportunity to become the ubiquitous choice for this new upcoming market across multiple industry sectors.
In order to achieve their goal of bringing this technology to the mass market, they are assembling a highly skilled team to build a complex SoC.
There are 2 positions available - one at Senior and one at Junior level.
To be successful for this role you must have a strong background in SoC verification and validation.
You will have:
For more information and a chat about this superb opportunity, please contact Rachel Mason at IC Resources