Description
Key Responsibilities:1) Develop testbenches for a non-volatile memory IP2) Creation of agents3) Make adaptations to existing and create new tests for new features of the NVM IP4) Show that the relevant tests are passing5) Define verification coverage6) Testbench Qualification using Certitude7) Documentation of verification results 8) Proof that relevant tests are passing9) Proof that verification coverage (structural and functional) is reached10) Proof that the testbenches have the required quality TSMC relevant-yes Proven experience (>5 years) in Digital IP verification using System Verilog / UVM
