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    Analogue IC Design Engineer - Cambridge, Cambridgeshire, United Kingdom - Energy Jobline CVL

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    Description
    Analogue IC Design Engineer | Cambridge | Up to £100K DOE

    Are you looking for a new opportunity within the Analogue IC Design space? Are you looking to offer your expertise to help scale a growing team? Are you looking to join a fast-growing company working on industry leading technologies in Smartphones, AR/VR & Wearables?Then this might just be the role for you.

    We are working with an industry leading electronics company that operate in the precision motion solutions space with their work being applied in the Smartphone, AR/VR and Wearables sectors.

    They are looking to bring in an IC Design Engineer with an Analogue bias to deliver industry leading IC Design and technical mentoring to a highly skilled, close-knit team.


    Key Responsibilities:
    Modelling and simulation of analogue designs for custom IC integration. Assessment and implementation of design improvements to optimise system performance. Building automated pre-silicon verification environment whilst supporting early development of embedded firmware throughout start of project.

    Integrate and partition in-house designs and IP from third parties and wrap with modelling logic to represent mixed signal design element.

    Asist with the validation of new silicon chips with a mix between CI/CD automation and manual tests through electrical test equipment.


    Qualifications and Experience:
    Strong experience in analogue custom IC design. Strong understanding of System on a Chip architecture and integration. Chip level architecture experience for mixed signal ASICs. Strong experience with modelling and verification for ASIC implementation. Experience in custom bench testing with System Verilog and Verilog-A.


    Knowledge of mixed signal circuitry:
    Analogue to Digital & Digital to analogue convertor design, Switching amplifiers & Oscillators. EDA tool experience for custom analogue IC development like Cadence, Mentor Graphics. IP Desing Specification & block level writing experience. Experience with Linux OS, revision control (Git) and scripting (Bash, Tcl, and Python). Some PCB Design experience. Some RTL coding experience with Verilog and System Verilog.


    Salary and Benefits:
    Up to £100K salary DOE. Travel opportunities. Private Health Insurance. Life insurance. 25 holidays plus public holidays (total of 33 days a year). Training by world leading experts. Cycle to work scheme #J-18808-Ljbffr


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