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    NPU System Performance Engineer - Cambridge, United Kingdom - Neubla

    Neubla
    Neubla Cambridge, United Kingdom

    1 month ago

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    Engineering / Architecture
    Description
    NPU System Performance Modelling Engineer in Cambridge, UK


    About NeublanAs pioneers of innovative neural computing, Neubla is transforming the future of computing by bringing the enormous potential of neural computing to the highest performance in most data-intensive applications.

    Neubla is made up of people with expertise and lots of experience in many different fields such as AI, semiconductor design, and compilers.

    At Neubla, you can work in a rapidly changing environment where your new ideas will become innovative products, services, and customer experiences, working with talented colleagues.

    Neubla offers a competitive package with benefits, including health insurance, a pension scheme, employee wellness support, and a variety of snacks in the office


    SummarynWe're looking for an exceptional individual with a passion to learn about ground-breaking AI architectures and who is eager to build highly optimised models for performance and functional simulation.nPerformance and functional simulation are critical tools for architecture exploration, and it has been used to make many important decisions of various systems.

    In this highly visible role, you will collaborate closely with multi-site HW and SW teams to investigate and evaluate new micro-architectural ideas and design trade-offs to shape the system features of the next generation AI accelerator by developing, verifying, and using performance models for data-driven architectural exploration and validation.

    Job DescriptionnDevelop, test, and maintain accurate performance models for system IPs, ranging from a memory subsystem to an interconnect for multiple processing elements or for die-to-die connectionnCollaborate with multi-site engineering teams to make data-driven decisions on many of their current engineering issuesnCollaborate with hardware design engineers to prune the design space of next generation NPU designs, understanding performance opportunities on current processors and investigate potential micro-architectural enhancementnCollaborate with software engineers to enable various levels of software development at the very early stagenSupport hardware design engineers to solve potential performance issues in design verification flowsnDevelop systems and performance analysis tools necessary for performance correlation and verification workflows

    QualificationsnMasters, PhD, or equivalent experience in Computer Engineering, Electrical Engineering, or related fieldnKnowledge of on-chip bus protocols such as AMBA, coherency flows, interconnects, memory subsystemsnDemonstrated ability in system performance modelling, workload analysis, system performance bottleneck debug and analysisnStrong problem solving and analytical skillsnStrong programming skills with good understanding of object-oriented languages such as C++/PythonnKnowledge of performance or functional modelling of NPUs, CPUs, or GPUsnExcellent collaboration skillsnOutstanding written and verbal communications

    Preferred QualificationsnKnowledge of Machine Learning concepts and ML hardware acceleratorsnPrior experience in simulator developmentnProficiency in computer/SoC architecture and performance trade-offsnKnowledge of a system modelling/simulation technology, such as SystemC, Gem5, Simics, QEMU and etcnKnowledge of Verilog and/or VHDL and experience with simulators and waveform debuggingnFamiliarity with RISC-V architectures and instruction setsnKnowledge of script languages

    The ProcessnApplication review > 1st Interview > 2nd Interview (technical) > 3rd Interview

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