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    Designs Validation Engineer - Peterborough, Cambridgeshire, United Kingdom - Trinnovo Group

    Trinnovo Group
    Trinnovo Group Peterborough, Cambridgeshire, United Kingdom

    2 weeks ago

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    Description

    My client is looking for an experienced FPGA Design & Verification Engineer to join their skilled projects team working on embedded IP and system design.

    Integrating your designs into SoC and reference designs, followed by rigorous system-level testing before deployment to our prototyping teams.

    Recent hands-on experience with RTL design using (System-)Verilog, coupled with a solid grasp of FPGA device architecture.

    Proficiency in RTL Verification, encompassing both unit and system levels, leveraging SystemVerilog with a knack for crafting System Verilog Assertions (SVA) checks and coverage metrics.

    Command over UNIX/Linux environments and scripting languages like Python, Tcl, Make, and bash, essential for thriving in our collaborative development ecosystem.

    Previous encounters with ASIC or FPGA synthesis tools, along with familiarity with data formats such as YAML and JSON, are definite pluses.

    A penchant for structured problem-solving coupled with a creative flair.
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