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    Design Lead - Cambridge, Cambridgeshire, United Kingdom - Codasip

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    Description

    We take pride in designing and developing cutting-edge, high-performance, and energy-efficient CPU cores from scratch, and our own automated proprietary tools to fully customize them.

    Our processor cores are based on the RISC-V open architecture.

    The potential for customizing RISC-V is unlocked with the Codasip Custom Compute approach:
    our unique architecture description language, CodAL, and the powerful automated processor design tool, Codasip Studio. Our Desing Centers and Sales Offices
    Founded in 2014, we've grown into a thriving and talented global community.

    Our IP engineering teams work from offices spread across Europe, including our first and largest design center in the beautiful city of Brno, Czechia.

    Across Europe, we already have design teams in Cambridge, Bristol, Munich, Villeneuve-Loubet, Barcelona, Thessaloniki, Heraklion, and Athens.

    The Codasip team is also based close to its customers, which means we have dedicated sales and application engineers in the USA, Japan, Korea, and China.

    Codasip is a private company backed by well-funded EU grants. About our UK Design Centres

    Our UK design centers in Cambridge and Bristol were set up in early 2022 to develop high-performance, low-power embedded and application CPU cores from scratch.

    We are embarking on clean-sheet designs, and expanding the teams of engineers who can establish high-quality working practices as they explore new ground.

    The UK Design Centers are led by Simon Bewick , who is also a VP IP Engineering at Codasip; Paul Sargent runs the whole verification domain of the UK Design Centers.

    Your role will be pivotal in shaping our company's strategy, focusing on both project aspects and broader organizational goals.

    Lead the expansion of our Verification team and capacity in the UK, building on top of established foundations and aligning efforts with company strategy and objectives.

    Take ownership of IP Verification projects.

    Provide technical leadership and guidance to the Verification team, building a culture of excellence in Verification methodologies and processes.

    Partner with cross-functional teams to optimize collaboration and streamline project execution.
    Stay abreast of industry trends and advancements, leveraging insights to drive innovation and maintain our competitive edge.

    A manager with extensive experience in semiconductor Verification, with a proven track record of leadership.

    Significant commercial experience with a variety of functional processor verification methodologies as applied to CPU or other ASIC verification (simulators, coverage collection, gate level simulation, etc...).

    Advanced knowledge of computer systems and architecture.

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