- Responsible for FPGA design and implementation of AI and image processing algorithms including requirements capture, RTL coding and verification stages using Verilog and SystemVerilog HDL languages.
- Using FPGA design toolsets and simulation tools (Quartus Prime, QuestaSim, and ModelSim).
- Perform resource and timing optimisation techniques on the project to fit the algorithms on the target FPGA.
- Collaborate closely with the software team to verify the system functionality and performance.
- Taking ownership of some small projects
- University degree in related field
- Proven experience in FPGA design
- Expert in Verilog/SystemVerilog Programming advantageous
- Full development lifecycle experience
- Experience with design and verification tools (ideally Quartus Prime and QuestaSim/ModelSim).
- Proven experience in resource optimisation and timing solutions
- Design experience of the Low/Medium speed data buses (SPI, I2C, Ethernet, etc)
- Design experience of the AXI interfaces and IP cores in the design
- Experience with scripting languages (e.g., Python, TCL).
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Product Engineer - Cambridge, Cambridgeshire, United Kingdom - Azenta Life Sciences
Description
FPGA Design EngineerPermanent
Based:
Cambridge
The FPGA Design Engineer develops complex designs with advanced algorithms in HDL that will be deployed in unique, complex systems.
What You'll Do:
What You Will Bring:
Ziath Tube & Rack Barcode Reading Systems.
Ziath tube & rack reader range provides dependable whole rack and single 2D barcode readers and scanners compatible with any 2D coded sample tubes available on the market.